Q. 8

# Truth table for the given circuit (Fig. 14.6) isA.ABE001010101110B.ABE001010100111C.ABE000011100111D.ABE000011101110

In the given network of gates, the output at C is due to A and B through the AND gate. The output at D is due to the signal of A through the NOT gate and B. Therefore,

and

The output at E is due to C and D through an OR gate. therefore

Therefore, the truth table can be constructed as follows,

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RELATED QUESTIONS :

Let evaluate X for

(a) A = 1, B = 0 C = 1

(b) A = B = C = 1 and

(c) A = B = C = 0.

HC Verma - Concepts of Physics Part 2

An AND gate can be prepared by repetitive use of

HC Verma - Concepts of Physics Part 2

Show that is always 1.

HC Verma - Concepts of Physics Part 2